Traditional central processing units “CPUs” process instructions based on “clocked time.” Specifically, CPUs operate such that information is transmitted at regular time intervals. Based on complementary metal-oxide-semiconductor “CMOS” technology, silicon-based chips may be manufactured with more than 5 billion transistors per die with features as small as 10 nm. Advances in CMOS technology have been parlayed into advances in parallel computing, which is used ubiquitously in cell phones and personal computers containing multiple processors.
However, as machine learning is becoming commonplace for numerous applications including bioinformatics, computer vision, video games, marketing, medical diagnostics, online search engines, etc., traditional CPUs are often not able to supply a sufficient amount of processing capability while keeping power consumption low. In particular, machine learning is a subsection of computer science directed to software having the ability to learn from and make predictions on data. Furthermore, one branch of machine learning includes deep learning, which is directed at utilizing deep (multilayer) neural networks.
Currently, research is being done to develop direct hardware implementations of deep neural networks, which may include systems that attempt to simulate “silicon” neurons (e.g., “neuromorphic computing”). Neuromorphic chips (e.g., silicon computing chips designed for neuromorphic computing) operate by processing instructions in parallel (e.g., in contrast to traditional sequential computers) using bursts of electric current transmitted at non-uniform intervals. As a result, neuromorphic chips require far less power to process information, specifically, artificial intelligence (AI) algorithms. To accomplish this, neuromorphic chips may contain as much as five times as many transistors as a traditional processor while consuming up to 2000 times less power. Thus, the development of neuromorphic chips is directed to provide a chip with vast processing capabilities that consumes far less power than conventional processors. Further, neuromorphic chips are designed to support dynamic learning in the context of complex and unstructured data.
When utilizing an analog array, values stored thereon may be susceptible to leakage or drifting, which may cause errors in the output voltage. Specifically, current leakage may be introduced to the circuitry of the analog array which may cause a voltage drift at the output. Provided herein are systems and methods for detecting current leakage or voltage drift and in response, reprogramming the analog array.